Design Software Tools and Embedded Processing
Altera’s Customizable Processor Portfolio
Comparative Summary of Altera’s Soft Processors by Performance and Feature Set
Category
Cost-and Power-Sensitive
Processors
Real-Time Processor
Applications Processors
Features
ARM Cortex-M1
Nios II Economy
Nios II
Standard
Nios II Fast
28 nm 1 Dual-Core
ARM Cortex-A9
20 nm 2 Dual-Core
ARM Cortex-A9
925 MHz
Maximum frequency (MHz)
200
330
270
290
(Cyclone V SoC)
1.05 GHz
1.5 GHz
(Arria V SoC)
Maximum performance
(MIPS 3 at MHz)
160 at 200
50 at 330
170 at 270
340 at 290
Stratix series
Maximum performance
(MIPS 3 at MHz)
Arria series
Maximum performance
(MIPS 3 at MHz)
Cyclone series
Maximum performance
efficiency (MIPS 3 per MHz)
16/32 bit instruction
set support
Level 1 instruction cache
Level 1 data cache
Level 2 cache
Memory management unit
Floating-point unit
Vector interrupt controller
Tightly coupled memory
Custom instruction
interface
Equivalent LEs
80 at 100
0.8
16 and 32
3
Up to 64K
2,500
45 at 300
30 at 175
0.15
32
Up to 256
600
115 at 180
90 at 145
0.64
32
Configurable
FPCI 4
3
Configurable
Up to 256
1,200
270 at 240
195 at 175
1.13
32
Configurable
Configurable
3
FPCI 4
3
Configurable
Up to 256
1,800 – 3,200
2,625 MIPS per
core at 1.05 GHz
2,313 MIPS per
core at 925 MHz
2.5
16 and 32
32 KB
32 KB
512 KB
3
Dual
precision
HPS
3,750 MIPS per
core at 1.5 GHz
2.5
16 and 32
32 KB
32 KB
512 KB
3
Dual
precision
HPS
1
2
3
4
Altera 28 nm SoCs comprise Cyclone V SoCs and Arria V SoCs
Altera 20 nm SoCs comprise Arria 10 SoCs
Dhrystone 2.1 benchmark
Floating-point custom instructions
Altera Product Catalog
?
2013
?
www.altera.com
57
相关PDF资料
DK-K7-CONN-CES-G KINTEX-7 FPGA CONNECTIVITY KIT
DK-K7-EMBD-CES-G-J KINTEX-7 FPGA EMBEDDED KIT JAPAN
DK-MAXII-1270N KIT DEV MAXII W/EPM 1270N
DK-N2EVAL-3C25N KIT DEV NIOS II CYCLONE III ED.
DK-NIOS-2C35N NIOS II KIT W/CYCLONE II EP2C35N
DK-NIOS-2S60N NIOS II KIT W/STRATIX II EP2S60N
DK-PCI-2C35N PCI KIT W/CYCLONE II EP2C35N
DK-PCIE-2SGX90N PCIE KIT W/S II GX EP2SGX90N
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